IDiyas Centurion Patentors as of February 4 2025

The 100+ Patent Elite Centurion inventors are pioneers with 100+ USPTO patents, driving innovation across industries.

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Centurion Patentors as of February 4 2025

Table of Contents

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Vice President and Qualcomm Fellow.

Dr. Peter Gaal has been actively engaged in CDMA2000 standardization, focusing on the physical layer and position location aspects. Since 2007, he has regularly participated in 3GPP meetings, initially contributing to the RAN4 working group and later to the RAN1 group.

In addition to his involvement in these groups, Dr. Gaal has significantly contributed to the design and development of LTE and 5G NR technologies. He holds a Ph.D. in Electrical Engineering from the University of Southern California, Los Angeles, CA.

Patent 12219509 – Secondary cell activation using temporary reference signals.

A user equipment (UE) receives an activation command for a second cell, measures a temporary reference signal, and operates based on the measurement, reducing activation delays.

Patent 12219566 – Uplink control information multiplexing.

A user equipment (UE) generates and transmits an uplink control information (UCI) message with multiplexed bits using orthogonal sequences.

Designer / Advisor at VAST.

Patent D1060349 – Head-mounted display.

Industrial Designer at Apple.

Patent D1060348 – Band.

Mr. Chen is an academic researcher from TSMC. Hsien-Wei Chen's contributions to the world of semiconductor technology through his extensive patent portfolio and career at TSMC underscore his significance in the field. His latest patents in stacked semiconductor devices and package fabrication methods demonstrate his ongoing commitment to enhancing device connectivity and functionality.

Patent 12218108 – Package and manufacturing method thereof.

This disclosure relates to a semiconductor package with stacked dies. A first die with a capacitor is spatially separated but electrically connected to a second die with another capacitor. An encapsulant laterally surrounds the second die.

Patent 12218105 – Package and method of forming the same.

This disclosure relates to a die stack structure where a first and second die are bonded using a hybrid bonding structure. A bonding insulating layer extends to contact an interconnect structure of one die.

Sr. Director, Engineering at Qualcomm Wireless Research.

Experienced Principal Engineer with a demonstrated history of technical leadership in the wireless industry. Strong professional skilled in cellular technologies including 5G sub-6GHz and mmW, LTE, 3G and broadcast technologies. Systems lead for 5G proto development for world’s leading demos for 5G.

Patent 12219566 – Uplink control information multiplexing.

A user equipment (UE) generates and transmits an uplink control information (UCI) message with multiplexed bits using orthogonal sequences.

Systems Engineer in WR&D Qualcomm Inc.

Alexandros Manolakos has made significant contributions to technology during his tenure at esteemed companies such as Qualcomm Incorporated and the Leland Stanford Junior University. His expertise in mobile technology and wireless communication has led to numerous breakthroughs in the industry.

Downlink positioning reference signals (PRS) may be preempted by higher-priority transmissions, such as ultra-reliable low-latency traffic (URLLC). A PRS preemption indication (PI) informs a user equipment (UE) about affected transmission reception points (TRPs) and specifies the preempted time and frequency domains.

Patent 12216221 – Low-layer (DCI or MAC CE) DL puncturing indicator for positioning reference signals (PRS).

Director, Technical Standards at Qualcomm Inc.

Patent 12216212 – Positioning reference signal repetition duration for non-terrestrial networks.

Principal Engineer at Qualcomm.

Patent 12219509 – Secondary cell activation using temporary reference signals.

AIO System CTO at BOE Technology Group Co., Ltd

Hao Zhang's impressive body of work exemplifies his dedication to solving critical environmental challenges and advancing display technology. His patents showcase his innovative approach to problems, providing effective solutions for the remediation of contaminated soil and enhancing the performance of display devices.

Patent 12215404 – Carbide-free tempered martensitic steels and preparation methods thereof.

The steel consists of a martensite matrix without carbide and submicron or nanoscale retained austenite in spherical, block, or film morphology, with a volume fraction of 10%-40%.

Patent 12214021 – Study on lactoferrin regulation of bone formation by means of vitamin D receptor.

This disclosure relates to the use of lactoferrin in food or drug preparation to activate the VDR signaling pathway for treating bone diseases, including osteoporosis, bone damage, calcium loss, incomplete development, and abnormalities.

Clara Courtaigne is a French designer with a wide range of skills, from creating objects and accessories to graphic design and illustration.

Since 2017, she has been the co-founder, with her sister, Juliette de Maupeou of the publishing house Siblings, which designs and manufactures tableware for contemporary tribes.

Turbine Technical Lead – Advanced Engines at Rolls-Royce North America.

Ted Joseph Freeman's journey as an inventor and innovator in turbine technology is a testament to his vision, skill, and relentless pursuit of excellence. With a remarkable portfolio of 200 patents, Freeman has made a substantial impact on the gas turbine industry.

Patent 12215593 – Turbine shroud assembly with inter-segment damping.

This disclosure relates to a turbine shroud assembly with first and second shroud segments and a seal assembly. The first shroud segment includes a carrier and a blade track segment, while the second is circumferentially adjacent. The seal assembly prevents gas leakage between them.

Semiconductor Packaging and Systems Integration Research – Principal Engineer at Intel Corporation.

Highly experienced Technologist consistently involved in the research of cutting-edge semiconductor packaging technologies and architectures delivering these to the development stage demonstrating vision, technical and project leadership and success.

This disclosure relates to an apparatus with first and second conductive contacts on a substrate, each with different pitch spacing. Conductive interconnects within the substrate couple corresponding contact groupings between die sites, with interconnects for different groupings arranged in separate substrate layers.

Patent 12218069 – Multi-chip package with high density interconnects.

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